// ==============================================================
// RTL generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC
// Version: 2016.1
// Copyright (C) 1986-2016 Xilinx, Inc. All Rights Reserved.
// 
// ===========================================================

`timescale 1 ns / 1 ps 

(* CORE_GENERATION_INFO="trace_cntrl,hls_ip_2016_1,{HLS_INPUT_TYPE=cxx,HLS_INPUT_FLOAT=0,HLS_INPUT_FIXED=1,HLS_INPUT_PART=xc7z020clg400-1,HLS_INPUT_CLOCK=6.000000,HLS_INPUT_ARCH=others,HLS_SYN_CLOCK=6.628000,HLS_SYN_LAT=-1,HLS_SYN_TPT=none,HLS_SYN_MEM=0,HLS_SYN_DSP=4,HLS_SYN_FF=631,HLS_SYN_LUT=706}" *)

module trace_cntrl (
        ap_clk,
        ap_rst_n,
        A_TDATA,
        A_TVALID,
        A_TREADY,
        A_TKEEP,
        A_TSTRB,
        A_TUSER,
        A_TLAST,
        A_TID,
        A_TDEST,
        B_TDATA,
        B_TVALID,
        B_TREADY,
        B_TKEEP,
        B_TSTRB,
        B_TUSER,
        B_TLAST,
        B_TID,
        B_TDEST,
        s_axi_trace_cntrl_AWVALID,
        s_axi_trace_cntrl_AWREADY,
        s_axi_trace_cntrl_AWADDR,
        s_axi_trace_cntrl_WVALID,
        s_axi_trace_cntrl_WREADY,
        s_axi_trace_cntrl_WDATA,
        s_axi_trace_cntrl_WSTRB,
        s_axi_trace_cntrl_ARVALID,
        s_axi_trace_cntrl_ARREADY,
        s_axi_trace_cntrl_ARADDR,
        s_axi_trace_cntrl_RVALID,
        s_axi_trace_cntrl_RREADY,
        s_axi_trace_cntrl_RDATA,
        s_axi_trace_cntrl_RRESP,
        s_axi_trace_cntrl_BVALID,
        s_axi_trace_cntrl_BREADY,
        s_axi_trace_cntrl_BRESP,
        interrupt
);

parameter    ap_ST_st1_fsm_0 = 11'b1;
parameter    ap_ST_st2_fsm_1 = 11'b10;
parameter    ap_ST_st3_fsm_2 = 11'b100;
parameter    ap_ST_st4_fsm_3 = 11'b1000;
parameter    ap_ST_st5_fsm_4 = 11'b10000;
parameter    ap_ST_st6_fsm_5 = 11'b100000;
parameter    ap_ST_st7_fsm_6 = 11'b1000000;
parameter    ap_ST_st8_fsm_7 = 11'b10000000;
parameter    ap_ST_st9_fsm_8 = 11'b100000000;
parameter    ap_ST_pp1_stg0_fsm_9 = 11'b1000000000;
parameter    ap_ST_st12_fsm_10 = 11'b10000000000;
parameter    ap_const_lv32_0 = 32'b00000000000000000000000000000000;
parameter    ap_const_lv32_7 = 32'b111;
parameter    ap_const_lv32_9 = 32'b1001;
parameter    C_S_AXI_TRACE_CNTRL_DATA_WIDTH = 32;
parameter    ap_const_int64_8 = 8;
parameter    C_S_AXI_TRACE_CNTRL_ADDR_WIDTH = 6;
parameter    C_S_AXI_DATA_WIDTH = 32;
parameter    ap_const_lv32_6 = 32'b110;
parameter    ap_const_lv32_8 = 32'b1000;
parameter    ap_const_lv31_0 = 31'b0000000000000000000000000000000;
parameter    ap_const_lv32_1 = 32'b1;
parameter    ap_const_lv32_FFFFFFFF = 32'b11111111111111111111111111111111;
parameter    ap_const_lv31_1 = 31'b1;
parameter    ap_const_lv32_A = 32'b1010;

parameter C_S_AXI_TRACE_CNTRL_WSTRB_WIDTH = (C_S_AXI_TRACE_CNTRL_DATA_WIDTH / ap_const_int64_8);
parameter C_S_AXI_WSTRB_WIDTH = (C_S_AXI_DATA_WIDTH / ap_const_int64_8);

input   ap_clk;
input   ap_rst_n;
input  [63:0] A_TDATA;
input   A_TVALID;
output   A_TREADY;
input  [7:0] A_TKEEP;
input  [7:0] A_TSTRB;
input  [1:0] A_TUSER;
input  [0:0] A_TLAST;
input  [4:0] A_TID;
input  [0:0] A_TDEST;
output  [63:0] B_TDATA;
output   B_TVALID;
input   B_TREADY;
output  [7:0] B_TKEEP;
output  [7:0] B_TSTRB;
output  [1:0] B_TUSER;
output  [0:0] B_TLAST;
output  [4:0] B_TID;
output  [0:0] B_TDEST;
input   s_axi_trace_cntrl_AWVALID;
output   s_axi_trace_cntrl_AWREADY;
input  [C_S_AXI_TRACE_CNTRL_ADDR_WIDTH - 1 : 0] s_axi_trace_cntrl_AWADDR;
input   s_axi_trace_cntrl_WVALID;
output   s_axi_trace_cntrl_WREADY;
input  [C_S_AXI_TRACE_CNTRL_DATA_WIDTH - 1 : 0] s_axi_trace_cntrl_WDATA;
input  [C_S_AXI_TRACE_CNTRL_WSTRB_WIDTH - 1 : 0] s_axi_trace_cntrl_WSTRB;
input   s_axi_trace_cntrl_ARVALID;
output   s_axi_trace_cntrl_ARREADY;
input  [C_S_AXI_TRACE_CNTRL_ADDR_WIDTH - 1 : 0] s_axi_trace_cntrl_ARADDR;
output   s_axi_trace_cntrl_RVALID;
input   s_axi_trace_cntrl_RREADY;
output  [C_S_AXI_TRACE_CNTRL_DATA_WIDTH - 1 : 0] s_axi_trace_cntrl_RDATA;
output  [1:0] s_axi_trace_cntrl_RRESP;
output   s_axi_trace_cntrl_BVALID;
input   s_axi_trace_cntrl_BREADY;
output  [1:0] s_axi_trace_cntrl_BRESP;
output   interrupt;

reg A_TREADY;
reg B_TVALID;

reg    ap_rst_n_inv;
wire    ap_start;
reg    ap_done;
reg    ap_idle;
(* fsm_encoding = "none" *) reg   [10:0] ap_CS_fsm;
reg    ap_sig_cseq_ST_st1_fsm_0;
reg    ap_sig_28;
reg    ap_ready;
wire   [63:0] data_compare_V;
wire  signed [31:0] length_r;
wire  signed [31:0] sample_rate;
reg    A_TDATA_blk_n;
reg    ap_sig_cseq_ST_st8_fsm_7;
reg    ap_sig_62;
reg    ap_sig_cseq_ST_pp1_stg0_fsm_9;
reg    ap_sig_69;
reg    ap_reg_ppiten_pp1_it0;
reg    ap_reg_ppiten_pp1_it1;
wire   [0:0] tmp_5_fu_293_p2;
reg   [0:0] match_phi_fu_183_p4;
reg    B_TDATA_blk_n;
reg   [0:0] or_cond_reg_534;
reg   [0:0] match_reg_179;
reg   [30:0] i_reg_191;
reg  signed [31:0] sample_rate_read_reg_407;
reg  signed [31:0] length_read_reg_413;
wire   [31:0] tmp_fu_232_p1;
reg   [31:0] tmp_reg_419;
wire   [31:0] grp_fu_226_p2;
reg   [31:0] total_input_samples_reg_425;
reg    ap_sig_cseq_ST_st7_fsm_6;
reg    ap_sig_147;
reg   [63:0] A_temp_data_V_reg_430;
reg   [7:0] A_temp_keep_V_reg_435;
reg   [7:0] A_temp_strb_V_reg_440;
reg   [1:0] A_temp_user_V_reg_445;
reg   [4:0] A_temp_id_V_reg_450;
reg   [0:0] A_temp_dest_V_reg_455;
wire   [31:0] tmp_4_fu_250_p2;
reg   [31:0] tmp_4_reg_520;
reg    ap_sig_cseq_ST_st9_fsm_8;
reg    ap_sig_171;
reg   [0:0] tmp_5_reg_525;
reg    ap_sig_175;
reg    ap_sig_ioackin_B_TREADY;
wire   [30:0] i_1_fu_298_p2;
wire   [0:0] or_cond_fu_342_p2;
wire   [0:0] A_temp_last_V_fu_362_p2;
reg   [0:0] A_temp_last_V_reg_538;
reg   [31:0] sample_counter_fu_86;
wire   [31:0] sample_counter_1_fu_348_p2;
reg   [31:0] samples_fu_90;
wire   [31:0] samples_1_fu_367_p2;
reg   [63:0] A_temp_data_V_1_fu_94;
reg   [7:0] A_temp_keep_V_1_fu_98;
reg   [7:0] A_temp_strb_V_1_fu_102;
reg   [1:0] A_temp_user_V_1_fu_106;
reg   [4:0] A_temp_id_V_1_fu_110;
reg   [0:0] A_temp_dest_V_1_fu_114;
reg    ap_reg_ioackin_B_TREADY;
wire   [31:0] tmp_1_fu_236_p1;
wire   [31:0] tmp_2_fu_240_p2;
wire   [31:0] i_cast_fu_289_p1;
wire   [0:0] tmp_7_fu_337_p2;
wire   [0:0] tmp_3_fu_245_p2;
reg    ap_sig_cseq_ST_st12_fsm_10;
reg    ap_sig_372;
reg   [10:0] ap_NS_fsm;

// power-on initialization
initial begin
#0 ap_CS_fsm = 11'b1;
#0 ap_reg_ppiten_pp1_it0 = 1'b0;
#0 ap_reg_ppiten_pp1_it1 = 1'b0;
#0 ap_reg_ioackin_B_TREADY = 1'b0;
end

trace_cntrl_trace_cntrl_s_axi #(
    .C_S_AXI_ADDR_WIDTH( C_S_AXI_TRACE_CNTRL_ADDR_WIDTH ),
    .C_S_AXI_DATA_WIDTH( C_S_AXI_TRACE_CNTRL_DATA_WIDTH ))
trace_cntrl_trace_cntrl_s_axi_U(
    .AWVALID(s_axi_trace_cntrl_AWVALID),
    .AWREADY(s_axi_trace_cntrl_AWREADY),
    .AWADDR(s_axi_trace_cntrl_AWADDR),
    .WVALID(s_axi_trace_cntrl_WVALID),
    .WREADY(s_axi_trace_cntrl_WREADY),
    .WDATA(s_axi_trace_cntrl_WDATA),
    .WSTRB(s_axi_trace_cntrl_WSTRB),
    .ARVALID(s_axi_trace_cntrl_ARVALID),
    .ARREADY(s_axi_trace_cntrl_ARREADY),
    .ARADDR(s_axi_trace_cntrl_ARADDR),
    .RVALID(s_axi_trace_cntrl_RVALID),
    .RREADY(s_axi_trace_cntrl_RREADY),
    .RDATA(s_axi_trace_cntrl_RDATA),
    .RRESP(s_axi_trace_cntrl_RRESP),
    .BVALID(s_axi_trace_cntrl_BVALID),
    .BREADY(s_axi_trace_cntrl_BREADY),
    .BRESP(s_axi_trace_cntrl_BRESP),
    .ACLK(ap_clk),
    .ARESET(ap_rst_n_inv),
    .ACLK_EN(1'b1),
    .ap_start(ap_start),
    .interrupt(interrupt),
    .ap_ready(ap_ready),
    .ap_done(ap_done),
    .ap_idle(ap_idle),
    .data_compare_V(data_compare_V),
    .length_r(length_r),
    .sample_rate(sample_rate)
);

trace_cntrl_mul_32s_32s_32_7 #(
    .ID( 1 ),
    .NUM_STAGE( 7 ),
    .din0_WIDTH( 32 ),
    .din1_WIDTH( 32 ),
    .dout_WIDTH( 32 ))
trace_cntrl_mul_32s_32s_32_7_U0(
    .clk(ap_clk),
    .reset(ap_rst_n_inv),
    .din0(sample_rate),
    .din1(length_r),
    .ce(1'b1),
    .dout(grp_fu_226_p2)
);

always @ (posedge ap_clk) begin
    if (ap_rst_n_inv == 1'b1) begin
        ap_CS_fsm <= ap_ST_st1_fsm_0;
    end else begin
        ap_CS_fsm <= ap_NS_fsm;
    end
end

always @ (posedge ap_clk) begin
    if (ap_rst_n_inv == 1'b1) begin
        ap_reg_ioackin_B_TREADY <= 1'b0;
    end else begin
        if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
            ap_reg_ioackin_B_TREADY <= 1'b0;
        end else if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & ~((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) & (1'b1 == B_TREADY))) begin
            ap_reg_ioackin_B_TREADY <= 1'b1;
        end
    end
end

always @ (posedge ap_clk) begin
    if (ap_rst_n_inv == 1'b1) begin
        ap_reg_ppiten_pp1_it0 <= 1'b0;
    end else begin
        if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
            ap_reg_ppiten_pp1_it0 <= 1'b0;
        end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
            ap_reg_ppiten_pp1_it0 <= 1'b1;
        end
    end
end

always @ (posedge ap_clk) begin
    if (ap_rst_n_inv == 1'b1) begin
        ap_reg_ppiten_pp1_it1 <= 1'b0;
    end else begin
        if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & ~(tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
            ap_reg_ppiten_pp1_it1 <= 1'b1;
        end else if (((1'b1 == ap_sig_cseq_ST_st9_fsm_8) | ((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY)))))) begin
            ap_reg_ppiten_pp1_it1 <= 1'b0;
        end
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        A_temp_data_V_1_fu_94 <= A_TDATA;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        A_temp_data_V_1_fu_94 <= A_temp_data_V_reg_430;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        A_temp_dest_V_1_fu_114 <= A_TDEST;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        A_temp_dest_V_1_fu_114 <= A_temp_dest_V_reg_455;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        A_temp_id_V_1_fu_110 <= A_TID;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        A_temp_id_V_1_fu_110 <= A_temp_id_V_reg_450;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        A_temp_keep_V_1_fu_98 <= A_TKEEP;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        A_temp_keep_V_1_fu_98 <= A_temp_keep_V_reg_435;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        A_temp_strb_V_1_fu_102 <= A_TSTRB;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        A_temp_strb_V_1_fu_102 <= A_temp_strb_V_reg_440;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        A_temp_user_V_1_fu_106 <= A_TUSER;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        A_temp_user_V_1_fu_106 <= A_temp_user_V_reg_445;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        i_reg_191 <= i_1_fu_298_p2;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        i_reg_191 <= ap_const_lv31_0;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it1) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))) & ~(1'b0 == tmp_5_reg_525))) begin
        match_reg_179 <= 1'b0;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        match_reg_179 <= 1'b1;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))) & ~(1'b0 == or_cond_fu_342_p2))) begin
        sample_counter_fu_86 <= ap_const_lv32_1;
    end else if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))) & (1'b0 == or_cond_fu_342_p2))) begin
        sample_counter_fu_86 <= sample_counter_1_fu_348_p2;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        sample_counter_fu_86 <= ap_const_lv32_0;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))) & ~(1'b0 == or_cond_fu_342_p2))) begin
        samples_fu_90 <= samples_1_fu_367_p2;
    end else if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        samples_fu_90 <= ap_const_lv32_0;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_st8_fsm_7) & ~(A_TVALID == 1'b0))) begin
        A_temp_data_V_reg_430 <= A_TDATA;
        A_temp_dest_V_reg_455 <= A_TDEST;
        A_temp_id_V_reg_450 <= A_TID;
        A_temp_keep_V_reg_435 <= A_TKEEP;
        A_temp_strb_V_reg_440 <= A_TSTRB;
        A_temp_user_V_reg_445 <= A_TUSER;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & ~(tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))) & ~(1'b0 == or_cond_fu_342_p2))) begin
        A_temp_last_V_reg_538 <= A_temp_last_V_fu_362_p2;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_st1_fsm_0) & ~(ap_start == 1'b0))) begin
        length_read_reg_413 <= length_r;
        sample_rate_read_reg_407 <= sample_rate;
        tmp_reg_419 <= tmp_fu_232_p1;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & ~(tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        or_cond_reg_534 <= or_cond_fu_342_p2;
    end
end

always @ (posedge ap_clk) begin
    if ((1'b1 == ap_sig_cseq_ST_st9_fsm_8)) begin
        tmp_4_reg_520 <= tmp_4_fu_250_p2;
    end
end

always @ (posedge ap_clk) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
        tmp_5_reg_525 <= tmp_5_fu_293_p2;
    end
end

always @ (posedge ap_clk) begin
    if ((1'b1 == ap_sig_cseq_ST_st7_fsm_6)) begin
        total_input_samples_reg_425 <= grp_fu_226_p2;
    end
end

always @ (*) begin
    if (((1'b1 == ap_sig_cseq_ST_st8_fsm_7) | ((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4)))) begin
        A_TDATA_blk_n = A_TVALID;
    end else begin
        A_TDATA_blk_n = 1'b1;
    end
end

always @ (*) begin
    if ((((1'b1 == ap_sig_cseq_ST_st8_fsm_7) & ~(A_TVALID == 1'b0)) | ((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it0) & ~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY)))))) begin
        A_TREADY = 1'b1;
    end else begin
        A_TREADY = 1'b0;
    end
end

always @ (*) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534))) begin
        B_TDATA_blk_n = B_TREADY;
    end else begin
        B_TDATA_blk_n = 1'b1;
    end
end

always @ (*) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & ~((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) & (1'b0 == ap_reg_ioackin_B_TREADY))) begin
        B_TVALID = 1'b1;
    end else begin
        B_TVALID = 1'b0;
    end
end

always @ (*) begin
    if ((1'b1 == ap_sig_cseq_ST_st12_fsm_10)) begin
        ap_done = 1'b1;
    end else begin
        ap_done = 1'b0;
    end
end

always @ (*) begin
    if (((1'b0 == ap_start) & (1'b1 == ap_sig_cseq_ST_st1_fsm_0))) begin
        ap_idle = 1'b1;
    end else begin
        ap_idle = 1'b0;
    end
end

always @ (*) begin
    if ((1'b1 == ap_sig_cseq_ST_st12_fsm_10)) begin
        ap_ready = 1'b1;
    end else begin
        ap_ready = 1'b0;
    end
end

always @ (*) begin
    if (ap_sig_69) begin
        ap_sig_cseq_ST_pp1_stg0_fsm_9 = 1'b1;
    end else begin
        ap_sig_cseq_ST_pp1_stg0_fsm_9 = 1'b0;
    end
end

always @ (*) begin
    if (ap_sig_372) begin
        ap_sig_cseq_ST_st12_fsm_10 = 1'b1;
    end else begin
        ap_sig_cseq_ST_st12_fsm_10 = 1'b0;
    end
end

always @ (*) begin
    if (ap_sig_28) begin
        ap_sig_cseq_ST_st1_fsm_0 = 1'b1;
    end else begin
        ap_sig_cseq_ST_st1_fsm_0 = 1'b0;
    end
end

always @ (*) begin
    if (ap_sig_147) begin
        ap_sig_cseq_ST_st7_fsm_6 = 1'b1;
    end else begin
        ap_sig_cseq_ST_st7_fsm_6 = 1'b0;
    end
end

always @ (*) begin
    if (ap_sig_62) begin
        ap_sig_cseq_ST_st8_fsm_7 = 1'b1;
    end else begin
        ap_sig_cseq_ST_st8_fsm_7 = 1'b0;
    end
end

always @ (*) begin
    if (ap_sig_171) begin
        ap_sig_cseq_ST_st9_fsm_8 = 1'b1;
    end else begin
        ap_sig_cseq_ST_st9_fsm_8 = 1'b0;
    end
end

always @ (*) begin
    if ((1'b0 == ap_reg_ioackin_B_TREADY)) begin
        ap_sig_ioackin_B_TREADY = B_TREADY;
    end else begin
        ap_sig_ioackin_B_TREADY = 1'b1;
    end
end

always @ (*) begin
    if (((1'b1 == ap_sig_cseq_ST_pp1_stg0_fsm_9) & (1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == tmp_5_reg_525))) begin
        match_phi_fu_183_p4 = 1'b0;
    end else begin
        match_phi_fu_183_p4 = match_reg_179;
    end
end

always @ (*) begin
    case (ap_CS_fsm)
        ap_ST_st1_fsm_0 : begin
            if (~(ap_start == 1'b0)) begin
                ap_NS_fsm = ap_ST_st2_fsm_1;
            end else begin
                ap_NS_fsm = ap_ST_st1_fsm_0;
            end
        end
        ap_ST_st2_fsm_1 : begin
            ap_NS_fsm = ap_ST_st3_fsm_2;
        end
        ap_ST_st3_fsm_2 : begin
            ap_NS_fsm = ap_ST_st4_fsm_3;
        end
        ap_ST_st4_fsm_3 : begin
            ap_NS_fsm = ap_ST_st5_fsm_4;
        end
        ap_ST_st5_fsm_4 : begin
            ap_NS_fsm = ap_ST_st6_fsm_5;
        end
        ap_ST_st6_fsm_5 : begin
            ap_NS_fsm = ap_ST_st7_fsm_6;
        end
        ap_ST_st7_fsm_6 : begin
            ap_NS_fsm = ap_ST_st8_fsm_7;
        end
        ap_ST_st8_fsm_7 : begin
            if ((~(A_TVALID == 1'b0) & (1'b0 == tmp_3_fu_245_p2))) begin
                ap_NS_fsm = ap_ST_st8_fsm_7;
            end else if ((~(A_TVALID == 1'b0) & ~(1'b0 == tmp_3_fu_245_p2))) begin
                ap_NS_fsm = ap_ST_st9_fsm_8;
            end else begin
                ap_NS_fsm = ap_ST_st8_fsm_7;
            end
        end
        ap_ST_st9_fsm_8 : begin
            ap_NS_fsm = ap_ST_pp1_stg0_fsm_9;
        end
        ap_ST_pp1_stg0_fsm_9 : begin
            if (~((1'b1 == ap_reg_ppiten_pp1_it0) & (tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
                ap_NS_fsm = ap_ST_pp1_stg0_fsm_9;
            end else if (((1'b1 == ap_reg_ppiten_pp1_it0) & (tmp_5_fu_293_p2 == 1'b0) & ~(((1'b1 == ap_reg_ppiten_pp1_it0) & ap_sig_175) | ((1'b1 == ap_reg_ppiten_pp1_it1) & ~(1'b0 == or_cond_reg_534) & (1'b0 == ap_sig_ioackin_B_TREADY))))) begin
                ap_NS_fsm = ap_ST_st12_fsm_10;
            end else begin
                ap_NS_fsm = ap_ST_pp1_stg0_fsm_9;
            end
        end
        ap_ST_st12_fsm_10 : begin
            ap_NS_fsm = ap_ST_st1_fsm_0;
        end
        default : begin
            ap_NS_fsm = 'bx;
        end
    endcase
end

assign A_temp_last_V_fu_362_p2 = ((samples_fu_90 == tmp_4_reg_520) ? 1'b1 : 1'b0);

assign B_TDATA = A_temp_data_V_1_fu_94;

assign B_TDEST = A_temp_dest_V_1_fu_114;

assign B_TID = A_temp_id_V_1_fu_110;

assign B_TKEEP = A_temp_keep_V_1_fu_98;

assign B_TLAST = A_temp_last_V_reg_538;

assign B_TSTRB = A_temp_strb_V_1_fu_102;

assign B_TUSER = A_temp_user_V_1_fu_106;

always @ (*) begin
    ap_rst_n_inv = ~ap_rst_n;
end

always @ (*) begin
    ap_sig_147 = (1'b1 == ap_CS_fsm[ap_const_lv32_6]);
end

always @ (*) begin
    ap_sig_171 = (1'b1 == ap_CS_fsm[ap_const_lv32_8]);
end

always @ (*) begin
    ap_sig_175 = (~(tmp_5_fu_293_p2 == 1'b0) & (1'b0 == match_phi_fu_183_p4) & (A_TVALID == 1'b0));
end

always @ (*) begin
    ap_sig_28 = (ap_CS_fsm[ap_const_lv32_0] == 1'b1);
end

always @ (*) begin
    ap_sig_372 = (1'b1 == ap_CS_fsm[ap_const_lv32_A]);
end

always @ (*) begin
    ap_sig_62 = (1'b1 == ap_CS_fsm[ap_const_lv32_7]);
end

always @ (*) begin
    ap_sig_69 = (1'b1 == ap_CS_fsm[ap_const_lv32_9]);
end

assign i_1_fu_298_p2 = (i_reg_191 + ap_const_lv31_1);

assign i_cast_fu_289_p1 = i_reg_191;

assign or_cond_fu_342_p2 = (tmp_7_fu_337_p2 | match_phi_fu_183_p4);

assign sample_counter_1_fu_348_p2 = (sample_counter_fu_86 + ap_const_lv32_1);

assign samples_1_fu_367_p2 = (samples_fu_90 + ap_const_lv32_1);

assign tmp_1_fu_236_p1 = A_TDATA[31:0];

assign tmp_2_fu_240_p2 = (tmp_reg_419 & tmp_1_fu_236_p1);

assign tmp_3_fu_245_p2 = ((tmp_2_fu_240_p2 == tmp_reg_419) ? 1'b1 : 1'b0);

assign tmp_4_fu_250_p2 = ($signed(length_read_reg_413) + $signed(ap_const_lv32_FFFFFFFF));

assign tmp_5_fu_293_p2 = (($signed(i_cast_fu_289_p1) < $signed(total_input_samples_reg_425)) ? 1'b1 : 1'b0);

assign tmp_7_fu_337_p2 = ((sample_counter_fu_86 == sample_rate_read_reg_407) ? 1'b1 : 1'b0);

assign tmp_fu_232_p1 = data_compare_V[31:0];

endmodule //trace_cntrl
